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INTEGRATED CIRCUITS
74F776 Pi-bus transceiver
Product specification IC15 Data Handbook 1990 Dec 19
Philips Semiconductors
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
FEATURES
* Octal latched transceiver
* Drives heavily loaded backplanes with equivalent load impedances down to 10 ohms * High drive (100mA) open collector drivers on B port * Reduced voltage swing (1 volt) produces less noise and reduces power consumption * High speed operation enhances performance of backplane buses and facilitates incident wave switching * Compatible with Pi-bus and IEEE 896 Futurebus standards * Built-in precision band-gap reference provides accurate receiver thresholds and improved noise immunity * Controlled output ramp and multiple GND pins minimize ground bounce * Glitch-free power up/power down operation * Multiple package options * Industrial temperature range available (-40C to +85C)
consumption and a series diode on the drivers to reduce capacitive loading. Incident wave switching is employed, therefore BTL propagation delays are short. Although the voltage swing is less for BTL, so is its receiver threshold, therefore noise margins are excellent. BTL offers low power consumption, low ground bounce, EMI and crosstalk, low capacitive loading, superior noise margin and low propagation delays. This results in a high bandwidth, reliable backplane. The 74F776 A port has TTL 3-state drivers and TTL receivers with a latch function. A separate high-level control voltage input (VX) is provided to limit the A side output level to a given voltage level (such as 3.3V). For 5.0V systems, VX is simply tied to VCC. The 74F776 has a designed feature to control the B output transitions during power sequencing. There are two possible sequencing, They are as follows: 1.When LE = low and OEBn = low then the B outputs are disabled until the LE circuitry takes control. Then the B outputs will follow the A inputs, making a maximum of one transition during power-up (or down). 2. If LE = high or OEBn = high then the B outputs will be disabled during power-up (or down).
DESCRIPTION
The 74F776 is an octal bidirectional latched transceiver and is intended to provide the electrical interface to a high performance wired-OR bus. The B port inverting drivers are low-capacitance open collector with controlled ramp and are designed to sink 100mA from 2 volts. The B port inverting receivers have a 100 mV threshold region and a 4ns glitch filter. The 74F776 B port interfaces to 'Backplane Transceiver Logic' (BTL). BTL features a reduced (1V to 2V) voltage swing for lower power
TYPE 74F776
TYPICAL PROPAGATION DELAY 6.5ns
TYPICAL SUPPLY CURRENT( TOTAL) 80mA
ORDERING INFORMATION
ORDER CODE COMMERCIAL RANGE DESCRIPTION VCC = 5V 10%, Tamb = 0C to +70C N74F776N N74F776A INDUSTRIAL RANGE VCC = 5V 10%, Tamb = -40C to +85C I74F776N I74F776A PKG DWG #
28-pin plastic DIP (600 mil) 28-pin PLCC
SOT117-2 SOT261-2
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS A0 - A7 B0 - B7 OEA OEB0, OEB1 LE A0 - A7 PNP latched inputs Data inputs with threshold circuitry A output enable input (active high) B output enable inputs (active low) Latch enable input (active low) 3-state outputs DESCRIPTION 74F (U.L.) HIGH/LOW 3.5/0.117 5.0/0.167 1.0/0.033 1.0/0.033 1.0/0.033 150/40 OC/166.7 LOAD VALUE HIGH/LOW 70A/70A 100A/100A 20A/20A 20A/20A 20A/20A 3mA/24mA OC/100mA
B0 - B7 Open collector outputs Notes to input and output loading and fan out table One (1.0) FAST unit load is defined as: 20A in the high state and 0.6mA in the low state. OC = Open collector.
December 19, 1990
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853 1121 01321
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
PIN CONFIGURATION
VCC 1 OEA 2 A0 3 GND 4 A1 5 A2 6 A3 7 GND 8 A4 9 A5 10 GND 11 A6 12 A7 13 VX 14 28 LE 27 B0 26 B1 25 GND 24 B2 23 B3 22 GND 21 B4 20 B5 19 B6 18 GND 17 B7 16 OEB1 15 OEB0
IEC/IEEE SYMBOL
15 16 28 2 3 EN1 EN3 27 & EN2
ID 3
2
5 6 7 9 10 12 13
26 24 23 21 20 19 17
SF00422
SF00424
PIN CONFIGURATION PLCC
GND A0 OEA VCC LE 4 A1 A2 A3 GND A4 5 6 7 8 9 PLCC 3 2 1 28 B0 27 B1 26 25 GND 24 B2 23 B3 22 GND 21 B4 20 B5 19 B6 12 A6 13 14 15 16 17 18
LOGIC SYMBOL
3 5 6 7 9 10 12 13
15 2 28 16
A0 A1 A2 A3 A4 A5 A6 A7 OEB0 OEA LE OEB1 B0 B1 B2 B3 B4 B5 B6 B7
A5 10 GND 11
27 26 24 23 21 20 19 17
A7 VX OEB0 OEB1 B7 GND
SF00423
VCC = Pin 1, VX = Pin 14 GND = Pin 4, 8, 11, 18, 22, 25
SF00425
PIN DESCRIPTION
SYMBOL A0 - A7 B0 - B7 OEB0 OEB1 OEA LE VX PINS 3, 5, 6, 7, 9, 10, 12, 13 27, 26, 24, 23, 21, 20, 19, 17 15 16 2 28 14 TYPE I/O I/O Input Input Input Input Input Enables the A outputs when high Latched when high (a special feature is built in for proper enabling times) Clamping voltage keeping VOH from rising above VX (VX = Vcc for normal use) NAME AND FUNCTION PNP latched input/3-state output (with VX control option) Data input with special threshold circuitry to reject noise/ open collector output, high current drive Enables the B outputs when both pins are low
December 19, 1990
3
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
LOGIC DIAGRAM
OEB0 OEB1 OEA LE A0 15 16 2 28 3 Data LE Q 27 B0
A1
5
Data LE
Q
26 B1
A2
6
Data LE
Q
24 B2
A3
7
Data LE
Q
23 B3
A4
9
Data LE
Q
21 B4
A5
10
Data LE
Q
20 B5
A6
12
Data LE
Q
19 B6
A7
13
Data LE
Q
17 B7
VCC = Pin 1, VX = Pin 14, GND = Pin 4, 8, 11, 18, 22, 25
SF00426
December 19, 1990
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Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
FUNCTION TABLE
INPUTS An H L X - - - - H L X - - - - H L X - - - - Bn* X X X - H L - X X X H L H L X X X H L H L LE L L H L H H H L L H L L H H L L H L L H H OEA L L L H H H H L L L H H H H L L L H H H H OEB0 L L L L L L L H H H H H H H X X X X X X X OEB1 L L L L L L L X X X X X X X H H H H H H H LATCH STATE H L Qn (1) H (2) H (2) Qn H L Qn H L Qn Qn H L Qn H L Qn Qn OUTPUTS An Z Z Z (1) H L Qn Z Z Z H L H L Z Z Z H L H L Bn Z L Qn (1) Z(2) Z(2) Qn Z Z Z Z Z Z Z Z Z Z Z Z Z Z B 3-state, data from B to A B and A 3-state B 3-state, data from B to A B and A 3-state Latch state to A and B A 3-state, latched data to B Feedback: A to B, B to A Preconditioned latch enabling data transfer from B to A A 3-state, data from A to B OPERATING MODE
Notes to function table H = High voltage level L = Low voltage level X = Don't care - = Input not externally driven Z = High impedance "off" state Qn = High or Low voltage level one setup time prior to the low-to-high LE transition. (1) = Condition will cause a feedback loop path: A to B and B to A. (2) = The latch must be preconditioned such that B inputs may assume a high or low level while OEB0 and OEB1 are low and LE is high. B* = Precaution should be taken to insure the B inputs do not float. If they do they are equal to low state.
December 19, 1990
5
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VX VIN Supply voltage Threshold control Input voltage OEBn, OEA, LE A0 - A7, B0 - B7 IIN VOUT IOUT Input current Voltage applied to output in high output state Current applied to output in low output state A0 - A7 B0 - B7 Tamb Operating free air temperature range Commercial range Industrial range Tstg Storage temperature range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to +5.5 -40 to +5 -0.5 to VCC 48 200 0 to +70 -40 to +85 -65 to +150 UNIT V V V V mA V mA mA
C C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VIH Supply voltage High-level input voltage Except B0 - B7 B0 - B7 VIL Low-level input voltage Except B0 - B7 B0 - B7 IIk Input clamp current Except A0 - A7 A0 - A7 IOH IOL High-level output current Low-level output current A0 - A7 A0 - A7 B0 - B7 Tamb Operating free air temperature range Commercial range Industrial range 0 -40 4.5 2.0 1.6 0.8 1.45 -18 -40 -3 24 100 +70 +85 LIMITS NOM 5.0 MAX 5.5 V V V V V mA mA mA mA mA UNIT
C C
December 19, 1990
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Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL IOH IOFF VOH PARAMETER High-level output current Power-off output current B0 - B7 B0 - B7 A74 TEST CONDITIONS1 VCC = MAX, VIL = MAX, VIH = MIN, VOH = 2.1V VCC = 0.0V, VIL = MAX, VIH = MIN, VOH = 2.1V VCC = MIN, High-level output voltage A0 - VIL = MAX, VIH = MIN VCC = MIN, VIL = MAX VIH = MIN VIK II IIH IIL Input clamp voltage A0 - A7 Except A0 - A7 Input current at maximum input voltage High-level input current Low-level input current OEBn, OEA, LE A0 - A7, B0 - B7 OEBn, OEA, LE B0 - B7 OEBn, OEA, LE B0 - B7 IOZH + IIH IOZL + IIL IX Off state output current, high level voltage applied Off state output current, low level voltage applied High-level control current A0 - A7 A0 - A7 VCC = MIN, II = IIK VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V VCC = MAX, VI = 5.5V VCC = MAX, VI = 2.7V, Bn -An =0V VCC = MAX, VI = 2.1V VCC = MAX, VI = 0.5V VCC = MAX, VI = 0.3V VCC = MAX, VO = 2.7V VCC = MAX, VO = 0.5V VCC = MAX, VX = VCC, LE = OEA = OEBn = 2.7V, A0 - A7 = 2.7V, B0 - B7 = 2.0V, VCC = MAX, VX = 3.13 & 3.47V, LE = OEA = 2.7V, OEBn = A0 - A7 = 2.7V, B0 - B7 = 2.0V, IOS Short circuit output current3 A0 - A7 only ICCH ICC Supply current (total) ICCL VCC = MAX, Bn = 1.8V, OEA = 2.0V, OEBn = 2.7V VCC = MAX VCC = MAX, VIL = 0.5V -100 -10 -60 65 100 IOH = -3mA, VX =VCC IOH = -4mA, VX =3.13V and 3.47V IOL = 20mA, VX = VCC IOL = 100mA IOL = 4mA 0.40 -0.5 -1.2 100 1 20 100 -20 -100 70 -70 100 10 -150 100 145 2.5 2.5 0.50 1.15 MIN LIMITS TYP2 MAX 100 100 VCC A A V V V V V V V A mA A A A A A A A A mA mA mA UNIT
A0 - A74 VOL Low-level output voltage B0 - B7
ICCZ 75 100 mA Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. Unless otherwise specified, VX = VCC for all test conditions. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 4. Due to test equipment limitations, actual test conditions are for VIH =1.8v and VIL = 1.3V.
December 19, 1990
7
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
AC ELECTRICAL CHARACTERISTICS
A PORT LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay Bn to An Output enable time to high or low, OEA to An Output disable time from high or low, OEA to An Waveform 1 Waveform 3, 4 Waveform 3, 4 5.5 4.5 8.0 8.5 2.0 2.0 TYP 8.0 6.0 10.5 11.0 3.5 4.5 MAX 12.0 9.0 13.5 13.5 6.0 7.0 Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 5.5 4.5 7.5 8.0 1.5 2.0 MAX 12.0 9.0 15.0 15.5 6.5 7.5 Tamb = -40C to +85C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 5.5 4.5 7.5 8.0 1.5 2.0 MAX 12.0 9.0 15.5 15.5 6.5 7.5 ns ns ns UNIT
B PORT LIMITS Tamb = +25C TEST SYMBOL PARAMETER CONDITION VCC = +5.0V CD = 30pF, RU = 9 MIN tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Propagation delay An to Bn Propagation delay LE to Bn Enable/disable time OEBn to An Transition time, B port 1.3V to 1.7V, 1.7V to 1.3V Waveform 1 Waveform 1 Waveform 1 Test Circuit and Waveforms 3.0 3.0 3.5 3.5 3.0 3.5 0.5 0.5 TYP 5.0 4.5 5.0 5.0 4.5 5.5 2.0 2.0 MAX 7.0 7.5 8.0 8.0 7.0 9.0 4.5 4.5 Tamb = 0C to +70C VCC = +5.0V 10% CD = 30pF, RU = 9 MIN 2.5 2.5 3.0 2.5 2.5 3.5 0.5 0.5 MAX 8.0 8.5 9.0 9.0 8.0 10.0 5.0 4.5 Tamb = -40C to +85C VCC = +5.0V 10% CD = 30pF, RU = 9 MIN 2.0 2.5 2.5 2.5 2.5 3.5 0.5 0.5 MAX 9.0 8.5 9.5 9.5 8.5 10.5 5.0 4.5 ns ns ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS TEST SYMBOL PARAMETER CONDITION Tamb = +25C VCC = +5.0V CL = 50pF, RL = 500 MIN tsu (H) tsu (L) th(H) th (L) tw (L) Setup time, high or low An to LE Hold time, high or low An to LE LE pulse width, low Waveform 2 Waveform 2 Waveform 2 3.5 4.5 0.0 0.0 4.0 TYP MAX Tamb = 0C to +70C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.5 5.0 0.0 0.0 5.0 MAX Tamb = -40C to +85C VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.5 5.0 0.0 0.0 5.0 MAX ns ns ns UNIT
AC WAVEFORMS
An, Bn, OEBn VM tPLH VM tPHL tsu(L) An, Bn VM VM LE VM VM An VM VM th(L) VM ts(H) tw(L) VM VM th(H)
SF00427
SF00428
Waveform 1. Propagation delay for data to output
Waveform 2. Data setup and hold times and LE pulse width
December 19, 1990
8
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
AC WAVEFORMS (Continued)
OEA VM tPZH An VM 0V OEA VOH -0.3V An VM tPZL VM VOL +0.3V VM tPLZ
VM tPHZ
SF00429
SF00430
Waveform 3. 3-state output enable time to high level and output Waveform 4. 3-state output enable time to low level and output disable time from high level disable time from low level Notes to AC waveforms For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORMS
SWITCH POSITION TEST SWITCH tPLZ, tPZL closed All other open
VIN PULSE GENERATOR RT D.U.T. tTLH (tr ) CL RL POSITIVE PULSE 10% 90% VM tw tTHL (tf ) AMP (V) 90% VM 10% low V 90% VCC 7.0V VOUT RL NEGATIVE PULSE VM 10% tTHL (tf ) tw VM 10% tTLH (tr ) low V 90% AMP (V)
Test circuit for 3-State outputs on A port
VCC 7.0V
Input pulse definition INPUT PULSE REQUIREMENTS family amplitude Low V A port 3.0V 2.0V 0.0V 1.0V VM 1.5V 1.0V rep. rate 1MHz 1MHz tw tTLH tTHL 2.5ns 4.0ns 500ns 2.5ns 500ns 4.0ns
VIN PULSE GENERATOR RT D.U.T.
VOUT
RU
CD
B port
Test circuit for outputs on B port DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RU = Pull up resistor; see AC electrical characteristics for value. CD = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
SF00431
December 19, 1990
9
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
DIP28: plastic dual in-line package; 28 leads (600 mil); long body
SOT117-2
1990 Dec 19
10
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
PLCC28: plastic leaded chip carrier; 28 leads
SOT261-2
1990 Dec 19
11
Philips Semiconductors
Product specification
Pi-bus transceiver
74F776
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05177
Philips Semiconductors
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